๐ŸŽฎ Mask-Lock Inference Chip

A physical AI cartridge. Embed model weights directly into silicon at manufacture. Plug it in. Get intelligence. No drivers. No cloud. No software stack.

80-150
Tokens/second on 2B model
2-3W
Active power draw
50ร—
Tokens/watt vs Jetson Orin
$35
Unit BOM at scale
12wk
FPGA prototype timeline
KV260
Target FPGA platform

What Is a Mask-Locked Chip?

Normally, a neural network runs on a GPU or NPU by loading weights from memory. The memory bus is the bottleneck โ€” data moves from DRAM to compute, and that physical movement costs energy and time.

A mask-locked chip flips this. The weights are etched into the silicon itself, at the last metal layer of fabrication (the mask step). The chip doesn't load weights โ€” the weights are the chip. This eliminates the memory bottleneck entirely.

The result: a physical AI cartridge, like a Nintendo game pak. Insert it, get inference. Swap cartridges for different models. No drivers. No software. The hardware is the model.

Why Cartridges?

๐ŸŽฏ Zero Config

Plug it in. It works. No CUDA, no Docker, no Python environment. A Raspberry Pi boots it in under a second.

๐Ÿ”’ Physically Locked

Weights are mask-embedded in metal. They cannot be extracted, copied, or tampered with. The model is the hardware.

๐Ÿ”„ Swappable

Different cartridge for different tasks. A navigation cartridge. A vision cartridge. A language cartridge. Like loading a different game.

๐Ÿš Swarm Native

Multiple cartridges coordinate automatically. Each handles what it's best at. The fleet math runs on the host CPU.

What Exists Now

The Stack

โ”Œโ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”
โ”‚  Application (your code)            โ”‚
โ”œโ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”ค
โ”‚  Cartridge Runtime  โ†โ”€โ”€ Host CPU    โ”‚
โ”œโ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”ค
โ”‚  Mask-Locked Inference Silicon      โ”‚
โ”‚  (ternary weights in metal layers)  โ”‚
โ”œโ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”ค
โ”‚  FPGA Prototype  โ†โ”€โ”€ KV260          โ”‚
โ””โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”˜

Why Now

Three forces converge in an 18-month window:

The edge AI chip market grows from $26B (2025) to $69B (2030). The sub-$100, sub-5W LLM segment is unclaimed.

Resources

๐Ÿ“ฆ Lucineer repo โ€” full research package, FPGA guide, executive summary, investor pitch
๐Ÿ”ฌ DO-178C evidence โ€” 26 Coq theorems for safety-critical certification
๐Ÿงฎ Fleet coordination math โ€” Laman rigidity, ZHC, Pythagorean48
๐ŸŽฎ Demos โ€” Eisenstein integer playground, Narrows autopilot

โ† Back to superinstance.ai